| 1. | We also develop a new word - level fault parallel fs algorithin for synchronous sequential circuits
接着又开发了一个新的单机字级故障并行fs算法。 |
| 2. | Optimize synchronous sequential circuit with retiming was introduced by leiserson and saxe in 1983 , and retiming optimizational algorithm was summarized comprehensively in 1991
Leiserson和saxe于1983年提出了利用重定时优化同步时序电路，并于1991年对重定时优化算法做了全面的总结。 |
| 3. | In order to eliminate the sequence conflict of synchronous sequential circuit and shorten the designable time of integrated circuits , the algorithms of retiming is deeply researched in this paper
本文对重定时算法进行了深入研究，目的在于消除同步时序电路的时序冲突，从而缩短集成电路的设计时间。 |
| 4. | Base on the existing synchronous sequential circuits fault simulator - hope , the test vector generation method of sequential circuits based on ant algorithm is systematically researched firstly
本文在同步时序电路故障模拟器? hope的基础上，率先对基于蚂蚁算法的时序电路测试矢量生成方法作了系统的开拓性研究。 |
| 5. | As emphasis , we propose a new backward width - flrst search circuit partitioning method with flip - flop as core for synchronous sequential circuits . and then based on it , we develop a new circuit parallel tg algorithm
最后重点对电路并行方法进行了研究，提出了一种新的以触发器为核且消除大功能块之间反馈的宽度优先反向搜索同步时序电路划分方法。 |
| 6. | Test vector generation based on ant algorithm is presented and implemented , the pheromone computation formula for sequential circuits and status transfer rules are given , and the test results are compared with the results of the other existing test generators - hitec , gatest , cris , digate and strategate , based on standard sequential circuits iscas ' 89 and other synchronous sequential circuits
提出并实现了基于蚂蚁算法的测试矢量生成，给出了针对时序电路测试矢量生成的信息素计算公式和状态转移规则。在iscas ’ 89标准时序电路和几个同步时序电路上实现了测试生成，并将生成结果和其它现有测试生成器( hitec ， gatest ， cris ， digate ， strategate )的生成结果作了比较、分析。 |
